diff --git a/src/SVM.Assembler.Core/Assembler.cs b/src/SVM.Assembler.Core/Assembler.cs index 1e1f49c..5d80859 100644 --- a/src/SVM.Assembler.Core/Assembler.cs +++ b/src/SVM.Assembler.Core/Assembler.cs @@ -115,7 +115,7 @@ LabelConstant InternalLbl { return operationResult; } - if (!ISA.InstructionDefinitions.TryGetValue(LexDef.LexMatchedItemId, out var instructionDef)) + if (!ISA.InstructionDefinitionAliases.TryGetValue(LexDef.LexMatchedItemId, out var instructionDef)) { return operationResult; } diff --git a/src/SVM.Assembler.Core/ISADefinition.cs b/src/SVM.Assembler.Core/ISADefinition.cs index 0b740df..0ca0e1d 100644 --- a/src/SVM.Assembler.Core/ISADefinition.cs +++ b/src/SVM.Assembler.Core/ISADefinition.cs @@ -1,21 +1,72 @@ using SVM.Core; +using System; using System.Collections.Generic; +using System.Diagnostics.CodeAnalysis; +using System.IO; +using System.Xml; +using System.Xml.Serialization; namespace SVM.Assembler.Core { + [Serializable] public class ISADefinition { - public Dictionary InstructionDefinitions = new Dictionary(); - public Dictionary LinkerFunctions = new Dictionary(); + public Dictionary InstructionDefinitions = new Dictionary(); + [NonSerialized] + public Dictionary InstructionDefinitionAliases = new Dictionary(); public void Init() { foreach (var item in InstructionDefinitions) { - if (!LinkerFunctions.TryAdd(item.Value.PrimaryInstruction, item.Value.linkerFunction)) + foreach (var alias in item.Value.aliases) { - LinkerFunctions[item.Value.PrimaryInstruction] = item.Value.linkerFunction; + if (!InstructionDefinitionAliases.TryAdd(alias, item.Value)) + { + InstructionDefinitionAliases[alias] = item.Value; + } } } } + static void PrintDepth(int depth) + { + for (int i = 0; i < depth; i++) + { + Console.Write("\t"); + } + } + static void ShowNode(XmlNode node, int depth = 0) + { + PrintDepth(depth); + Console.WriteLine($"[+]{node.NodeType}:{node.Name}"); + foreach (XmlAttribute item in node.Attributes) + { + PrintDepth(depth + 1); + Console.WriteLine($"[i]{item.NodeType}:{item.Name}={item.InnerText}"); + + } + foreach (XmlElement item in node.ChildNodes) + { + if (item is XmlNode cnode) + { + ShowNode(cnode, depth + 1); + } + else + { + PrintDepth(depth + 1); + Console.Write($"[?]{item.NodeType}:{item.Name}"); + } + } + } + public static bool TryParse(Stream inputStream, [MaybeNullWhen(false)] out ISADefinition definition) + { + XmlDocument xmlDocument = new XmlDocument(); + xmlDocument.Load(inputStream); + foreach (XmlNode item in xmlDocument.ChildNodes) + { + ShowNode(item, 0); + } + definition = null; + return false; + } } } diff --git a/src/SVM.Assembler.Core/InstructionDefinition.cs b/src/SVM.Assembler.Core/InstructionDefinition.cs index 3e5af8f..4b96e9a 100644 --- a/src/SVM.Assembler.Core/InstructionDefinition.cs +++ b/src/SVM.Assembler.Core/InstructionDefinition.cs @@ -7,15 +7,8 @@ namespace SVM.Assembler.Core [Serializable] public class InstructionDefinition { - public string MatchID; - public PrimaryInstruction PrimaryInstruction; - public LinkerFunction linkerFunction; - public InstructionDefinition(string matchID, LinkerFunction assemblerFunction) - { - MatchID = matchID; - this.linkerFunction = assemblerFunction; - } - + public PrimaryInstruction PrimaryInstruction = PrimaryInstruction.Nop; + public List aliases = new List(); public List ParameterPattern = new List(); } } diff --git a/src/SVM.Assembler.Core/InstructionParameter.cs b/src/SVM.Assembler.Core/InstructionParameter.cs index 23e6627..4292015 100644 --- a/src/SVM.Assembler.Core/InstructionParameter.cs +++ b/src/SVM.Assembler.Core/InstructionParameter.cs @@ -1,9 +1,20 @@ -using System.Collections.Generic; +using SVM.Core; +using System; +using System.Collections.Generic; namespace SVM.Assembler.Core { + [Serializable] public class InstructionParameter { public List AllowedTokenIds = new List(); + public ExpectdValue ExpectdValue = new ExpectdValue(); + } + [Serializable] + public class ExpectdValue + { + public SVMNativeTypes Type; + public int Pos; + public string Converter = ""; } } diff --git a/src/SVM.Assembler.Core/Linker.cs b/src/SVM.Assembler.Core/Linker.cs index 8f07b1e..34402e3 100644 --- a/src/SVM.Assembler.Core/Linker.cs +++ b/src/SVM.Assembler.Core/Linker.cs @@ -37,6 +37,12 @@ namespace SVM.Assembler.Core } return operationResult; } + public static OperationResult translate(InstructionDefinition def, LinkingContext context, IntermediateInstruction iinstruction) + { + OperationResult result = new OperationResult(); + + return result; + } public unsafe static OperationResult Finialize(ISADefinition definition, IntermediateObject Obj) { OperationResult operationResult = new OperationResult(null); @@ -60,9 +66,10 @@ namespace SVM.Assembler.Core } foreach (var item in Obj.instructions) { - if (definition.LinkerFunctions.TryGetValue(item.inst, out var func)) + if (definition.InstructionDefinitions.TryGetValue(item.inst, out var def)) { - var inst = func(context, item); + + var inst = translate(def, context, item); if (operationResult.CheckAndInheritErrorAndWarnings(inst)) { return operationResult; diff --git a/src/SVM.Assembler/ISA.xml b/src/SVM.Assembler/ISA.xml new file mode 100644 index 0000000..acc5b07 --- /dev/null +++ b/src/SVM.Assembler/ISA.xml @@ -0,0 +1,46 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/src/SVM.Assembler/Program.cs b/src/SVM.Assembler/Program.cs new file mode 100644 index 0000000..ddd79c9 --- /dev/null +++ b/src/SVM.Assembler/Program.cs @@ -0,0 +1,25 @@ +using SVM.Assembler.Core; +using System.Reflection; +using System.Runtime.Serialization; +using System.Xml.Serialization; + +namespace SVM.Assembler +{ + internal class Program + { + static void Main(string[] args) + { + var fs = Assembly.GetExecutingAssembly().GetManifestResourceStream("SVM.Assembler.ISA.xml"); + if (fs is null) + { + Console.WriteLine("Cannot find ISA definition!"); + return; + } + if(!ISADefinition.TryParse(fs, out var def)) + { + Console.WriteLine("Cannot load ISA definition!"); + return; + } + } + } +} diff --git a/src/SVM.Assembler/SVM.Assembler.csproj b/src/SVM.Assembler/SVM.Assembler.csproj new file mode 100644 index 0000000..2f6f22f --- /dev/null +++ b/src/SVM.Assembler/SVM.Assembler.csproj @@ -0,0 +1,24 @@ + + + + Exe + net9.0 + enable + enable + true + true + + + + + + + + + + + + + + + diff --git a/src/SVM.Core/PrimaryInstruction.cs b/src/SVM.Core/PrimaryInstruction.cs index 32a741e..c718ccf 100644 --- a/src/SVM.Core/PrimaryInstruction.cs +++ b/src/SVM.Core/PrimaryInstruction.cs @@ -2,9 +2,14 @@ { public enum PrimaryInstruction : byte { - // 0 1 2 3 4 5 6 - // Math [I]Op [I]Type [R]L [R]R [R]T [I]CheckOF + Nop, + // 0 1 2 3 4 5 + // Math [I]Op [I]Type [R]L [R]R [R]T BMath, + /// + /// Checked Binary Math + /// + CBMath, // 0 1 2 3 4 // Math [I]Op [I]Type [R]L [R]T UMath, diff --git a/src/SVM.Core/SimpleVirtualMachine.cs b/src/SVM.Core/SimpleVirtualMachine.cs index 9325f5b..e0fc0d5 100644 --- a/src/SVM.Core/SimpleVirtualMachine.cs +++ b/src/SVM.Core/SimpleVirtualMachine.cs @@ -79,20 +79,48 @@ namespace SVM.Core var L = Instruction.GetData(3); var R = Instruction.GetData(4); var T = Instruction.GetData(5); - var Of = Instruction.GetData(6); switch (Op) { case BMathOp.Add: - MathImpl.MathAdd(registers, statePtr, NativeType, L, R, T, Of == 1); + MathImpl.MathAdd(registers, statePtr, NativeType, L, R, T, false); break; case BMathOp.Sub: - MathImpl.MathSub(registers, statePtr, NativeType, L, R, T, Of == 1); + MathImpl.MathSub(registers, statePtr, NativeType, L, R, T, false); break; case BMathOp.Mul: - MathImpl.MathMul(registers, statePtr, NativeType, L, R, T, Of == 1); + MathImpl.MathMul(registers, statePtr, NativeType, L, R, T, false); break; case BMathOp.Div: - MathImpl.MathDiv(registers, statePtr, NativeType, L, R, T, Of == 1); + MathImpl.MathDiv(registers, statePtr, NativeType, L, R, T, false); + break; + case BMathOp.Mod: + MathImpl.MathMod(registers, statePtr, NativeType, L, R, T); + break; + default: + break; + } + } + break; + case PrimaryInstruction.CBMath: + { + var Op = Instruction.GetData(1); + var NativeType = Instruction.GetData(2); + var L = Instruction.GetData(3); + var R = Instruction.GetData(4); + var T = Instruction.GetData(5); + switch (Op) + { + case BMathOp.Add: + MathImpl.MathAdd(registers, statePtr, NativeType, L, R, T, true); + break; + case BMathOp.Sub: + MathImpl.MathSub(registers, statePtr, NativeType, L, R, T, true); + break; + case BMathOp.Mul: + MathImpl.MathMul(registers, statePtr, NativeType, L, R, T, true); + break; + case BMathOp.Div: + MathImpl.MathDiv(registers, statePtr, NativeType, L, R, T, true); break; case BMathOp.Mod: MathImpl.MathMod(registers, statePtr, NativeType, L, R, T); diff --git a/src/SVM.sln b/src/SVM.sln index 6e41308..c3c67da 100644 --- a/src/SVM.sln +++ b/src/SVM.sln @@ -9,6 +9,8 @@ Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "SVM.Standalone", "SVM.Stand EndProject Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "SVM.Assembler.Core", "SVM.Assembler.Core\SVM.Assembler.Core.csproj", "{B51D33D7-920B-44DE-8EB8-F8E8DFAE4CA8}" EndProject +Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "SVM.Assembler", "SVM.Assembler\SVM.Assembler.csproj", "{E2B82455-3947-4C11-82D0-178E8D8C3D64}" +EndProject Global GlobalSection(SolutionConfigurationPlatforms) = preSolution Debug|Any CPU = Debug|Any CPU @@ -55,6 +57,18 @@ Global {B51D33D7-920B-44DE-8EB8-F8E8DFAE4CA8}.Release|x64.Build.0 = Release|Any CPU {B51D33D7-920B-44DE-8EB8-F8E8DFAE4CA8}.Release|x86.ActiveCfg = Release|Any CPU {B51D33D7-920B-44DE-8EB8-F8E8DFAE4CA8}.Release|x86.Build.0 = Release|Any CPU + {E2B82455-3947-4C11-82D0-178E8D8C3D64}.Debug|Any CPU.ActiveCfg = Debug|Any CPU + {E2B82455-3947-4C11-82D0-178E8D8C3D64}.Debug|Any CPU.Build.0 = Debug|Any CPU + {E2B82455-3947-4C11-82D0-178E8D8C3D64}.Debug|x64.ActiveCfg = Debug|Any CPU + {E2B82455-3947-4C11-82D0-178E8D8C3D64}.Debug|x64.Build.0 = Debug|Any CPU + {E2B82455-3947-4C11-82D0-178E8D8C3D64}.Debug|x86.ActiveCfg = Debug|Any CPU + {E2B82455-3947-4C11-82D0-178E8D8C3D64}.Debug|x86.Build.0 = Debug|Any CPU + {E2B82455-3947-4C11-82D0-178E8D8C3D64}.Release|Any CPU.ActiveCfg = Release|Any CPU + {E2B82455-3947-4C11-82D0-178E8D8C3D64}.Release|Any CPU.Build.0 = Release|Any CPU + {E2B82455-3947-4C11-82D0-178E8D8C3D64}.Release|x64.ActiveCfg = Release|Any CPU + {E2B82455-3947-4C11-82D0-178E8D8C3D64}.Release|x64.Build.0 = Release|Any CPU + {E2B82455-3947-4C11-82D0-178E8D8C3D64}.Release|x86.ActiveCfg = Release|Any CPU + {E2B82455-3947-4C11-82D0-178E8D8C3D64}.Release|x86.Build.0 = Release|Any CPU EndGlobalSection GlobalSection(SolutionProperties) = preSolution HideSolutionNode = FALSE