mirror of
https://github.com/creeperlv/SVM.git
synced 2026-01-11 12:59:54 +00:00
Added a sample program.
Change: JAL -> JMP, JALF -> JIF.
This commit is contained in:
18
examples/hello.s
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18
examples/hello.s
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@@ -0,0 +1,18 @@
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.data:
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text0 "Hello, World!\n"
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file_name "example.txt"
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.code:
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sd.int32 $4 123
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write_file:
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sd.int32 $20 -4
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sd.int32 $10 file_name
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sd.int32 $11 11
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sd.int32 $12 1
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sys 5
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sd.int32 $11 text0
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sd.int32 $12 14
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sys 4
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return
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sd.int32 $10 100
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sys 1
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bmath add Int32 $4 $5 $6
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@@ -130,6 +130,7 @@
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<InstructionDefinition Id="return" PrimaryInstruction="Return" InstructionCount="1">
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<InstructionDefinition Id="return" PrimaryInstruction="Return" InstructionCount="1">
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<Aliases>
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<Aliases>
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<Alias Name="return"/>
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<Alias Name="return"/>
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<Alias Name="ret"/>
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</Aliases>
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</Aliases>
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<Parameters>
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<Parameters>
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<InstructionParameter>
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<InstructionParameter>
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@@ -26,13 +26,13 @@
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SD,
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SD,
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// 0 1
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// 0 1
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// JAL RD
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// JMP RD
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// [I]Address (int32)
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// [I]Address (int32)
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JAL,
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JMP,
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// Jump And Link If Conditional Register is set.
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// Jump And Link If Conditional Register is set.
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// JALF RD FlagID
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// JIF RD FlagID
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// [I]Address (int32)
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// [I]Address (int32)
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JALF,
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JIF,
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// 0 1 2 3
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// 0 1 2 3
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// Load [R]Address [I]Len [R]T
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// Load [R]Address [I]Len [R]T
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Load,
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Load,
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@@ -217,9 +217,9 @@ namespace SVM.Core
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//Console.WriteLine($"SVM:SD:{data} form PC={PC}");
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//Console.WriteLine($"SVM:SD:{data} form PC={PC}");
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}
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}
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break;
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break;
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case PrimaryInstruction.JAL:
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case PrimaryInstruction.JMP:
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break;
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break;
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case PrimaryInstruction.JALF:
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case PrimaryInstruction.JIF:
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break;
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break;
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case PrimaryInstruction.Load:
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case PrimaryInstruction.Load:
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{
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{
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